COMMAND RECEIVER CIRCUIT

General Description

The serial command line carries the camera commands from the computer to the camera. This data enters the command receiver circuit one bit at a time. The first bit to arrive is the start bit,followed by 8 data bits and then the stop bit. The start bit enables the input shift register and starts the shift register clock. The clock is initially low. When it goes high, the start bit, which is a high, is latched into the first of eight data positions in the shift register. When the clock goes low, the first data bit arrives at the shift register input. On the rising edge of the clock, the shift register "shifts" the high start bit from position 1 to position 2, and shifts the first data bit from the shift register input, into position 1. As each successive bit arrives, each one is shifted into the shift register on-the rising clock edge. When the start bit finally shifts into position 8, the camera has received all of the command information., The first six data bits are transferred from the shift register into a latch (memory) called the Command Register. The clock is disabled and the shift register is cleared. Now the six camera command bits are in the Command Register and the receiver is ready to get another command.

Circuit Description

The start bit from the computer appears as a high level at the output of the inverter at G1-12. The rising edge of this start bit clocks flip-flop F1-9 to the high state. This line clears the reset on IC's F2 and F4. F2 is a shift register and F4 is used as a divide-by-16 counter. F4's input is a clock whose frequency is 16 times greater than the baud rate (16x clock). After eight clock cycles, the counter output (F4-11) goes high, shifting the start bit into position 1 (F2-3) of the shift register. 8 clock cycles later, the shift register clock at F4-11 goes low and the first data bit arrives. 8 clock cycles later F4-11 goes high, shifting the data bit into position 2 (F2-3), and the start bit into position 1 (F2-4). This process continues until the start bit reaches position 8 (F2-13). The high start bit causes a low at the flip-flop RESET input (F1- 13). This causes the flip-flop Q/ output (F1-8) to go high, latching the serial register data into the Command Register, F3. At the same time, the flip-flop Q output (F1-9) goes low, resetting F2 and F4.